A parallel 32×32 time-to-digital converter array fabricated in a 130 nm imaging CMOS technology

Marek Gersbach, Y. Maruyama, E. Labonne, J. Richardson, R. Walker, L. Grant, R. Henderson, Fausto Borghetti, David Stoppa, Edoardo Charbon. A parallel 32×32 time-to-digital converter array fabricated in a 130 nm imaging CMOS technology. In 35th European Solid-State Circuits Conference, ESSCIRC 2009, Athens, Greece, 14-18 September 2009. pages 196-199, IEEE, 2009. [doi]

@inproceedings{GersbachMLRWGHB09,
  title = {A parallel 32×32 time-to-digital converter array fabricated in a 130 nm imaging CMOS technology},
  author = {Marek Gersbach and Y. Maruyama and E. Labonne and J. Richardson and R. Walker and L. Grant and R. Henderson and Fausto Borghetti and David Stoppa and Edoardo Charbon},
  year = {2009},
  doi = {10.1109/ESSCIRC.2009.5326021},
  url = {https://doi.org/10.1109/ESSCIRC.2009.5326021},
  researchr = {https://researchr.org/publication/GersbachMLRWGHB09},
  cites = {0},
  citedby = {0},
  pages = {196-199},
  booktitle = {35th European Solid-State Circuits Conference, ESSCIRC 2009, Athens, Greece, 14-18 September 2009},
  publisher = {IEEE},
  isbn = {978-1-4244-4354-3},
}