Impact of gate stack process on conduction and reliability of 0.18 mum PMOSFET

G. Ghidini, A. Garavaglia, G. Giusto, A. Ghetti, R. Bottini, D. Peschiaroli, M. Scaravaggi, F. Cazzaniga, D. Ielmini. Impact of gate stack process on conduction and reliability of 0.18 mum PMOSFET. Microelectronics Reliability, 43(8):1221-1227, 2003. [doi]

Authors

G. Ghidini

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A. Garavaglia

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G. Giusto

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A. Ghetti

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R. Bottini

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D. Peschiaroli

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M. Scaravaggi

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F. Cazzaniga

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D. Ielmini

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