Maged Ghoneima, Yehea I. Ismail. Low-power on-chip bus architecture using dynamic relative delays. In Proceedings 2004 IEEE International SOC Conference, September 12-15, 2004, Hilton Santa Clara, CA, USA. pages 233-236, IEEE, 2004. [doi]
@inproceedings{GhoneimaI04-0,
title = {Low-power on-chip bus architecture using dynamic relative delays},
author = {Maged Ghoneima and Yehea I. Ismail},
year = {2004},
doi = {10.1109/SOCC.2004.1362419},
url = {http://dx.doi.org/10.1109/SOCC.2004.1362419},
researchr = {https://researchr.org/publication/GhoneimaI04-0},
cites = {0},
citedby = {0},
pages = {233-236},
booktitle = {Proceedings 2004 IEEE International SOC Conference, September 12-15, 2004, Hilton Santa Clara, CA, USA},
publisher = {IEEE},
isbn = {0-7803-8445-8},
}