Design for hierarchical testability of RTL circuits obtained by behavioral synthesis

Indradeep Ghosh, Anand Raghunathan, Niraj K. Jha. Design for hierarchical testability of RTL circuits obtained by behavioral synthesis. In 1995 International Conference on Computer Design (ICCD 95), VLSI in Computers and Processors, October 2-4, 1995, Austin, TX, USA, Proceedings. pages 173-179, IEEE Computer Society, 1995. [doi]

Abstract

Abstract is missing.