Highly Interleaved 5b 250MS/s ADC with Redundant Channels in 65nm CMOS - researchr publication authors

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Brian P. Ginsburg, Anantha P. Chandrakasan. Highly Interleaved 5b 250MS/s ADC with Redundant Channels in 65nm CMOS. In 2008 IEEE International Solid-State Circuits Conference, ISSCC 2008, Digest of Technical Papers, San Francisco, CA, USA, February 3-7, 2008. pages 240-241, IEEE, 2008. [doi]

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