Brian P. Ginsburg, Anantha P. Chandrakasan. Highly Interleaved 5b 250MS/s ADC with Redundant Channels in 65nm CMOS. In 2008 IEEE International Solid-State Circuits Conference, ISSCC 2008, Digest of Technical Papers, San Francisco, CA, USA, February 3-7, 2008. pages 240-241, IEEE, 2008. [doi]
@inproceedings{GinsburgC08-0,
title = {Highly Interleaved 5b 250MS/s ADC with Redundant Channels in 65nm CMOS},
author = {Brian P. Ginsburg and Anantha P. Chandrakasan},
year = {2008},
doi = {10.1109/ISSCC.2008.4523146},
url = {http://dx.doi.org/10.1109/ISSCC.2008.4523146},
researchr = {https://researchr.org/publication/GinsburgC08-0},
cites = {0},
citedby = {0},
pages = {240-241},
booktitle = {2008 IEEE International Solid-State Circuits Conference, ISSCC 2008, Digest of Technical Papers, San Francisco, CA, USA, February 3-7, 2008},
publisher = {IEEE},
isbn = {978-1-4244-2010-0},
}