Evaluating power consumption of parameterized cache and bus architectures in system-on-a-chip designs

T. D. Givargis, Frank Vahid, Jörg Henkel. Evaluating power consumption of parameterized cache and bus architectures in system-on-a-chip designs. IEEE Trans. VLSI Syst., 9(4):500-508, 2001. [doi]

Abstract

Abstract is missing.