Test and debug strategy for TSMC CoWoS™ stacking process based heterogeneous 3D IC: A silicon case study

Sandeep Kumar Goel, Saman Adham, Min-Jer Wang, Ji-Jan Chen, Tze-Chiang Huang, Ashok Mehta, Frank Lee, Vivek Chickermane, Brion L. Keller, Thomas Valind, Subhasish Mukherjee, Navdeep Sood, Jeongho Cho, Hayden Hyungdong Lee, Jungi Choi, Sangdoo Kim. Test and debug strategy for TSMC CoWoS™ stacking process based heterogeneous 3D IC: A silicon case study. In 2013 IEEE International Test Conference, ITC 2013, Anaheim, CA, USA, September 6-13, 2013. pages 1-10, IEEE Computer Society, 2013. [doi]

@inproceedings{GoelAWCHMLCKVMSCLCK13,
  title = {Test and debug strategy for TSMC CoWoS™ stacking process based heterogeneous 3D IC: A silicon case study},
  author = {Sandeep Kumar Goel and Saman Adham and Min-Jer Wang and Ji-Jan Chen and Tze-Chiang Huang and Ashok Mehta and Frank Lee and Vivek Chickermane and Brion L. Keller and Thomas Valind and Subhasish Mukherjee and Navdeep Sood and Jeongho Cho and Hayden Hyungdong Lee and Jungi Choi and Sangdoo Kim},
  year = {2013},
  doi = {10.1109/TEST.2013.6651893},
  url = {http://doi.ieeecomputersociety.org/10.1109/TEST.2013.6651893},
  researchr = {https://researchr.org/publication/GoelAWCHMLCKVMSCLCK13},
  cites = {0},
  citedby = {0},
  pages = {1-10},
  booktitle = {2013 IEEE International Test Conference, ITC 2013, Anaheim, CA, USA, September 6-13, 2013},
  publisher = {IEEE Computer Society},
}