Layout-Driven SOC Test Architecture Design for Test Time and Wire Length Minimization

Sandeep Kumar Goel, Erik Jan Marinissen. Layout-Driven SOC Test Architecture Design for Test Time and Wire Length Minimization. In 2003 Design, Automation and Test in Europe Conference and Exposition (DATE 2003), 3-7 March 2003, Munich, Germany. pages 10738-10741, IEEE Computer Society, 2003. [doi]

Authors

Sandeep Kumar Goel

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Erik Jan Marinissen

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