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Sandeep Kumar Goel, Erik Jan Marinissen. SOC test architecture design for efficient utilization of test bandwidth. ACM Trans. Design Autom. Electr. Syst., 8(4):399-429, 2003. [doi]
Possibly Related PublicationsThe following publications are possibly variants of this publication: Effective and Efficient Test Architecture Design for SOCsSandeep Kumar Goel, Erik Jan Marinissen. itc 2002: 529-538 [doi] Layout-Driven SOC Test Architecture Design for Test Time and Wire Length MinimizationSandeep Kumar Goel, Erik Jan Marinissen. date 2003: 10738-10741 [doi]
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