Daniel Gomez-Prado, Dusung Kim, Maciej J. Ciesielski, Emmanuel Boutillon. Retiming arithmetic datapaths using Timed Taylor Expansion Diagrams. In IEEE International High Level Design Validation and Test Workshop, HLDVT 2010, Anaheim, CA, USA, 10-12 June 2010. pages 33-39, IEEE, 2010. [doi]
Abstract is missing.