Alejandro F. González, Mayukh Bhattacharya, Shriram Kulkarni, Pinaki Mazumder. Standard CMOS Implementation of a Multiple-Valued Logic Signed-Digit Adder Based on Negative Differential-Resistance Devices. In ISMVL. pages 323, 2000. [doi]
@inproceedings{GonzalezBKM00,
title = {Standard CMOS Implementation of a Multiple-Valued Logic Signed-Digit Adder Based on Negative Differential-Resistance Devices},
author = {Alejandro F. González and Mayukh Bhattacharya and Shriram Kulkarni and Pinaki Mazumder},
year = {2000},
url = {http://computer.org/proceedings/ismvl/0692/06920323abs.htm},
tags = {rule-based, logic},
researchr = {https://researchr.org/publication/GonzalezBKM00},
cites = {0},
citedby = {0},
pages = {323},
booktitle = {ISMVL},
}