Compact Signed-Digit Adder Using Multiple-Valued Logic

Alejandro F. González, Pinaki Mazumder. Compact Signed-Digit Adder Using Multiple-Valued Logic. In 17th Conference on Advanced Research in VLSI (ARVLSI 97), September 15-16, 1997, Ann Arbor, MI, USA. pages 96-113, IEEE Computer Society, 1997. [doi]

Abstract

Abstract is missing.