A high-speed dynamic instruction scheduling scheme for superscalar processors

Masahiro Goshima, Kengo Nishino, Toshiaki Kitamura, Yasuhiko Nakashima, Shinji Tomita, Shin-ichiro Mori. A high-speed dynamic instruction scheduling scheme for superscalar processors. In Proceedings of the 34th Annual International Symposium on Microarchitecture, Austin, Texas, USA, December 1-5, 2001. pages 225-236, ACM/IEEE, 2001. [doi]

Abstract

Abstract is missing.