Tejaswi Gowda, Sarma B. K. Vrudhula, Goran Konjevod. Combinational equivalence checking for threshold logic circuits. In Hai Zhou, Enrico Macii, Zhiyuan Yan, Yehia Massoud, editors, Proceedings of the 17th ACM Great Lakes Symposium on VLSI 2007, Stresa, Lago Maggiore, Italy, March 11-13, 2007. pages 102-107, ACM, 2007. [doi]
@inproceedings{GowdaVK07,
title = {Combinational equivalence checking for threshold logic circuits},
author = {Tejaswi Gowda and Sarma B. K. Vrudhula and Goran Konjevod},
year = {2007},
doi = {10.1145/1228784.1228813},
url = {http://doi.acm.org/10.1145/1228784.1228813},
tags = {logic},
researchr = {https://researchr.org/publication/GowdaVK07},
cites = {0},
citedby = {0},
pages = {102-107},
booktitle = {Proceedings of the 17th ACM Great Lakes Symposium on VLSI 2007, Stresa, Lago Maggiore, Italy, March 11-13, 2007},
editor = {Hai Zhou and Enrico Macii and Zhiyuan Yan and Yehia Massoud},
publisher = {ACM},
isbn = {978-1-59593-605-9},
}