D. Gracia, D. Nirmal, D. Jackuline Moni. Analysis of nanoscale digital circuits using novel drain-gate underlap DMG hetero-dielectric TFET. Microelectronics Journal, 119:105323, 2022. [doi]
@article{GraciaNM22,
title = {Analysis of nanoscale digital circuits using novel drain-gate underlap DMG hetero-dielectric TFET},
author = {D. Gracia and D. Nirmal and D. Jackuline Moni},
year = {2022},
doi = {10.1016/j.mejo.2021.105323},
url = {https://doi.org/10.1016/j.mejo.2021.105323},
researchr = {https://researchr.org/publication/GraciaNM22},
cites = {0},
citedby = {0},
journal = {Microelectronics Journal},
volume = {119},
pages = {105323},
}