Analysis of nanoscale digital circuits using novel drain-gate underlap DMG hetero-dielectric TFET

D. Gracia, D. Nirmal, D. Jackuline Moni. Analysis of nanoscale digital circuits using novel drain-gate underlap DMG hetero-dielectric TFET. Microelectronics Journal, 119:105323, 2022. [doi]

Abstract

Abstract is missing.