3A: a partitionable parallel/pipeline architecture for real-time image processing

C. Thomas Gray, Wentai Liu, Thomas A. Hughes, Ralph K. Cavin III, Sh-shing Chen. 3A: a partitionable parallel/pipeline architecture for real-time image processing. In 10th IAPR International Conference on Pattern Recognition, Conference C: image, speech, and signal processing, and Conference D: computer architecture for vision in pattern recognition, ICPR 1990, Atlantic City, NJ, USA, 16-21 June, 1990, Volume 2. pages 529-531, IEEE, 1990. [doi]

Abstract

Abstract is missing.