Daniel Große, Rolf Drechsler. Acceleration of SAT-Based Iterative Property Checking. In Dominique Borrione, Wolfgang J. Paul, editors, Correct Hardware Design and Verification Methods, 13th IFIP WG 10.5 Advanced Research Working Conference, CHARME 2005, Saarbrücken, Germany, October 3-6, 2005, Proceedings. Volume 3725 of Lecture Notes in Computer Science, pages 349-353, Springer, 2005. [doi]
@inproceedings{GrosseD05:0,
title = {Acceleration of SAT-Based Iterative Property Checking},
author = {Daniel Große and Rolf Drechsler},
year = {2005},
doi = {10.1007/11560548_29},
url = {http://dx.doi.org/10.1007/11560548_29},
tags = {rule-based},
researchr = {https://researchr.org/publication/GrosseD05%3A0},
cites = {0},
citedby = {0},
pages = {349-353},
booktitle = {Correct Hardware Design and Verification Methods, 13th IFIP WG 10.5 Advanced Research Working Conference, CHARME 2005, Saarbrücken, Germany, October 3-6, 2005, Proceedings},
editor = {Dominique Borrione and Wolfgang J. Paul},
volume = {3725},
series = {Lecture Notes in Computer Science},
publisher = {Springer},
isbn = {3-540-29105-9},
}