Licheng Guo, Pongstorn Maidee, Yun Zhou, Chris Lavin 0001, Jie Wang 0022, Yuze Chi, Weikang Qiao, Alireza Kaviani, Zhiru Zhang, Jason Cong. RapidStream: Parallel Physical Implementation of FPGA HLS Designs. In Michael Adler, Paolo Ienne, editors, FPGA '22: The 2022 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, Virtual Event, USA, 27 February 2022 - 1 March 2022. pages 1-12, ACM, 2022. [doi]
@inproceedings{GuoMZ00CQKZC22,
title = {RapidStream: Parallel Physical Implementation of FPGA HLS Designs},
author = {Licheng Guo and Pongstorn Maidee and Yun Zhou and Chris Lavin 0001 and Jie Wang 0022 and Yuze Chi and Weikang Qiao and Alireza Kaviani and Zhiru Zhang and Jason Cong},
year = {2022},
doi = {10.1145/3490422.3502361},
url = {https://doi.org/10.1145/3490422.3502361},
researchr = {https://researchr.org/publication/GuoMZ00CQKZC22},
cites = {0},
citedby = {0},
pages = {1-12},
booktitle = {FPGA '22: The 2022 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, Virtual Event, USA, 27 February 2022 - 1 March 2022},
editor = {Michael Adler and Paolo Ienne},
publisher = {ACM},
isbn = {978-1-4503-9149-8},
}