Jin Guo, Antonis Papanikolaou, Pol Marchal, Francky Catthoor. Energy/area/delay trade-offs in the physical design of on-chip segmented bus architecture. In Mike Hutton, Joni Dambre, editors, The Eigth International Workshop on System-Level Interconnect Prediction (SLIP 2006), Munich, Germany, March 4-5, 2006, Proceedings. pages 75-81, ACM, 2006. [doi]
Abstract is missing.