OASIS: A 28-nm 32-kb SRAM-Based Computing-in-Memory Design With Output Activation Sparsity Support - researchr publication authors

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Qingyu Guo, Nanbing Pan, Xin Qiao, Xiaoxin Cui, Yuan Wang 0001. OASIS: A 28-nm 32-kb SRAM-Based Computing-in-Memory Design With Output Activation Sparsity Support. IEEE Trans. Circuits Syst. II Express Briefs, 71(4):1899-1903, April 2024. [doi]

This author has not been identified. Look up 'Qingyu Guo' in GoogleThis author has not been identified. Look up 'Nanbing Pan' in GoogleThis author has not been identified. Look up 'Xin Qiao' in GoogleThis author has not been identified. Look up 'Xiaoxin Cui' in GoogleThis author has not been identified. Look up 'Yuan Wang 0001' in Google

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