Qingyu Guo, Nanbing Pan, Xin Qiao, Xiaoxin Cui, Yuan Wang 0001. OASIS: A 28-nm 32-kb SRAM-Based Computing-in-Memory Design With Output Activation Sparsity Support. IEEE Trans. Circuits Syst. II Express Briefs, 71(4):1899-1903, April 2024. [doi]
@article{GuoPQCW24,
title = {OASIS: A 28-nm 32-kb SRAM-Based Computing-in-Memory Design With Output Activation Sparsity Support},
author = {Qingyu Guo and Nanbing Pan and Xin Qiao and Xiaoxin Cui and Yuan Wang 0001},
year = {2024},
month = {April},
doi = {10.1109/TCSII.2023.3339622},
url = {https://doi.org/10.1109/TCSII.2023.3339622},
researchr = {https://researchr.org/publication/GuoPQCW24},
cites = {0},
citedby = {0},
journal = {IEEE Trans. Circuits Syst. II Express Briefs},
volume = {71},
number = {4},
pages = {1899-1903},
}