Ruifeng Guo, Irith Pomeranz, Sudhakar M. Reddy. A Fault Simulation Based Test Pattern Generator for Synchronous Sequential Circuits. In 17th IEEE VLSI Test Symposium (VTS 99), 25-30 April 1999, San Diego, CA, USA. pages 260-267, IEEE Computer Society, 1999. [doi]
Abstract is missing.