The 10GHz 4: 1 MUX and 1: 4 DEMUX implemented via the gigahertz SiGe FPGA

Jong-Ru Guo, Chao You, Paul F. Curran, Michael Chu, Kuan Zhou, Jiedong Diao, A. George, Russell P. Kraft, John F. McDonald. The 10GHz 4: 1 MUX and 1: 4 DEMUX implemented via the gigahertz SiGe FPGA. In David Garrett, John Lach, Charles A. Zukowski, editors, Proceedings of the 14th ACM Great Lakes Symposium on VLSI 2004, Boston, MA, USA, April 26-28, 2004. pages 141-144, ACM, 2004. [doi]

@inproceedings{GuoYCCZDGKM04,
  title = {The 10GHz 4: 1 MUX and 1: 4 DEMUX implemented via the gigahertz SiGe FPGA},
  author = {Jong-Ru Guo and Chao You and Paul F. Curran and Michael Chu and Kuan Zhou and Jiedong Diao and A. George and Russell P. Kraft and John F. McDonald},
  year = {2004},
  doi = {10.1145/988952.988987},
  url = {http://doi.acm.org/10.1145/988952.988987},
  researchr = {https://researchr.org/publication/GuoYCCZDGKM04},
  cites = {0},
  citedby = {0},
  pages = {141-144},
  booktitle = {Proceedings of the 14th ACM Great Lakes Symposium on VLSI 2004, Boston, MA, USA, April 26-28, 2004},
  editor = {David Garrett and John Lach and Charles A. Zukowski},
  publisher = {ACM},
  isbn = {1-58113-853-9},
}