Kuan Zhou - researchr alias

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Viewing Publication 1 - 23 from 23

2019

Dynamic Block Size Adjustment and Workload Balancing Strategy Based on CPU-GPU Heterogeneous PlatformJuan Fang, Kuan Zhou, Chen Tan, Hui Zhao 0013. ispa 2019: 999-1006 [doi]

2015

High-Speed Reconfigurable Circuits for Multirate Systems in SiGe HBT TechnologyMitchell R. LeRoy, Srikumar Raman, Michael Chu, Jin-Woo Kim, Jong-Ru Guo, Kuan Zhou, Chao You, Ryan Clarke, Bryan S. Goda, John F. McDonald. pieee, 103(7):1181-1196, 2015. [doi]

2011

On-chip dynamic programming networks using 3D-TSV integrationRa'ed Al-Dujaily, Terrence S. T. Mak, Kuan Zhou, Kai-Pui Lam, Yicong Meng, Alexandre Yakovlev, Chi-Sang Poon. samos 2011: 318-325 [doi]

Iono-neuromorphic implementation of spike-timing-dependent synaptic plasticityYicong Meng, Kuan Zhou, Joshua J. C. Monzon, Chi-Sang Poon. embc 2011: 7274-7277 [doi]

2010

A 10B 200MHz pipeline ADC with minimal feedback penalty and 0.35pJ/conversion-stepGang Chen, Yifei Luo, Jiayin Tian, Kuan Zhou. socc 2010: 59-64 [doi]

2009

A picosecond TDC architecture for multiphase PLLsYifei Luo, Gang Chen, Kuan Zhou. glvlsi 2009: 437-440 [doi]

Impact of Deep-Trench-Isolation-Sharing Techniques on Ultrahigh-Speed Digital SystemsKuan Zhou, John F. McDonald. tcas, 56-II(10):778-782, 2009. [doi]

2006

Triple-rail MOS current mode logic for high-speed self-timed pipeline applicationsKuan Zhou, Yifei Luo, Sizhong Chen, A. Drake, John F. McDonald, Tong Zhang. iscas 2006: [doi]

2005

2004

2003

A scalable 2 V, 20 GHz FPGA using SiGe HBT BiCMOS technologyJong-Ru Guo, Chao You, Kuan Zhou, Bryan S. Goda, Russell P. Kraft, John F. McDonald. fpga 2003: 145-153 [doi]

A Novel Multi-Speed, Power Saving Architecture for SiGe HBT FPGAJong-Ru Guo, Chao You, Michael Chu, Kuan Zhou, Young Uk Yim, Robert W. Heikaus, Russell P. Kraft, John F. McDonald. ersa 2003: 181-187

3D direct vertical interconnect microprocessors test vehicleJohn Mayega, Okan Erdogan, Paul M. Belemjian, Kuan Zhou, John F. McDonald, Russell P. Kraft. glvlsi 2003: 141-146 [doi]

Gigahertz FPGA by SiGe BiCMOS Technology for Low Power, High Speed Computing with 3-D MemoryChao You, Jong-Ru Guo, Russell P. Kraft, Michael Chu, Robert W. Heikaus, Okan Erdogan, Peter F. Curran, Bryan S. Goda, Kuan Zhou, John F. McDonald. fpl 2003: 11-20 [doi]

A 5-20 GHz, low power FPGA implemented by SiGe HBT BiCMOS technologyChao You, Jong-Ru Guo, Russell P. Kraft, Kuan Zhou, Michael Chu, John F. McDonald. glvlsi 2003: 37-40 [doi]

A four-bit full adder implemented on fast SiGe FPGAs with novel power control schemeKuan Zhou, Michael Chu, Chao You, Jong-Ru Guo, Channakeshav, John Mayega, John F. McDonald, Russell P. Kraft, Bryan S. Goda. fpga 2003: 248 [doi]

2002

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