Abstract is missing.
- Supercomputing: Past, present, and a possible futureAlex Ramírez. [doi]
- Methods for design and implementation of dynamic signal processing systemsShuvra S. Bhattacharyya. [doi]
- On STM concurrency control for multicore embedded real-time softwareSherif Fadel Fahmy, Binoy Ravindran. 1-8 [doi]
- Accelerating collective communication in message passing on manycore System-on-ChipStefan Wallentowitz, Marcel Meyer, Thomas Wild, Andreas Herkersdorf. 9-16 [doi]
- On the impact of dynamic task scheduling in heterogeneous MPSoCsOliver Arnold, Gerhard Fettweis. 17-24 [doi]
- Skeleton-based automatic parallelization of image processing algorithms for GPUsCedric Nugteren, Henk Corporaal, Bart Mesman. 25-32 [doi]
- Power adaptive computing system design in energy harvesting environmentQiang Liu, Terrence S. T. Mak, Junwen Luo, Wayne Luk, Alexandre Yakovlev. 33-40 [doi]
- Smart cache: A self adaptive cache architecture for energy efficiencyKarthik T. Sundararajan, Timothy M. Jones, Nigel P. Topham. 41-50 [doi]
- Power proportional characteristics of an energy manager for web clustersSimon Holmbacka, Sébastien Lafond, Johan Lilius. 51-58 [doi]
- Thermal optimization for micro-architectures through selective block replicationDionysios Diamantopoulos, Kostas Siozios, Sotirios Xydis, Dimitrios Soudris. 59-66 [doi]
- Design metrics and visualization techniques for analyzing the performance of MOEAs in DSEToktam Taghavi, Andy D. Pimentel. 67-76 [doi]
- Architecture design space exploration of run-time scalable issue-width processorsRalf König, Timo Stripf, Jan Heisswolf, Jürgen Becker. 77-84 [doi]
- TCEMC: A co-design flow for application-specific multicoresPekka Jääskeläinen, Erno Salminen, Carlos S. de La Lama, Jarmo Takala, José Ignacio Martínez. 85-92 [doi]
- Multi-domain transformational design flow for embedded systemsKenneth C. Rovers, Marcel D. van de Burgwal, Jan Kuper, André B. J. Kokkeler, Gerard J. M. Smit. 93-101 [doi]
- Dedicated hardware accelerators for the epistatic analysis of human genetic dataFabio Cancare, Alessandro Marin, Donatella Sciuto. 102-109 [doi]
- Vector processor customization for FFTBogdan Spinean, Georgi Kuzmanov, Georgi Gaydadjiev. 110-117 [doi]
- FPGA based application specific processing for sensor nodesTeemu Nylanden, Janne Janhunen, Jari Hannuksela, Olli Silvén. 118-123 [doi]
- Parametrized hardware architectures for the Lucas primality testAdrien Le Masle, Wayne Luk, Csaba Andras Moritz. 124-131 [doi]
- Distributed resource management for concurrent execution of multimedia applications on MPSoC platformsAhsan Shabbir, Akash Kumar, Bart Mesman, Henk Corporaal. 132-139 [doi]
- High level quantitative hardware prediction modeling using statistical methodsRoel Meeuws, Carlo Galuzzi, Koen Bertels. 140-149 [doi]
- Removal of unnecessary context switches from the systemc simulation kernel for fast VP simulationKun Lu, Daniel Mueller-Gritschneder, Ulf Schlichtmann. 150-156 [doi]
- A novel ADL-based compiler-centric software framework for reconfigurable mixed-ISA processorsTimo Stripf, Ralf König, Jürgen Becker. 157-164 [doi]
- ADL-based specification of implementation styles for functional simulatorsDavid A. Penry, Kurtis Cahill. 165-173 [doi]
- A performance estimation flow for embedded systems with mixed software/hardware modelingJoffrey Kriegel, Alain Pegatoquet, Michel Auguin, Florian Broekaert. 174-181 [doi]
- Calibration and validation of software performance models for pedestrian detection systemsRainer Kiesel, Martin Streubühr, Christian Haubelt, Otto Löhlein, Jürgen Teich. 182-189 [doi]
- Scalable multi-core simulation using parallel dynamic binary translationOscar Almer, Igor Böhm, Tobias J. K. Edler von Koch, Björn Franke, Stephen C. Kyle, Volker Seeker, Christopher Thompson, Nigel P. Topham. 190-199 [doi]
- Fully-automatic derivation of exact program-flow constraints for a tighter worst-case execution-time analysisAmine Marref. 200-208 [doi]
- A hardware accelerated configurable ASIP architecture for embedded real-time video-based driver assistance applicationsGregor Schewior, Holger Flatt, Carsten Dolar, Christian Banz, Holger Blume. 209-216 [doi]
- Task-based parallel H.264 video encoding for explicit communication architecturesMichail Alvanos, George Tzenakis, Dimitrios S. Nikolopoulos, Angelos Bilas. 217-224 [doi]
- High throughput and scalable architecture for unified transform coding in embedded H.264/AVC video coding systemsTiago Dias, Sebastián López, Nuno Roma, Leonel Sousa. 225-232 [doi]
- Scalable ASIP implementation and parallelization of a MIMO sphere detectorEsther P. Adeva, Björn Mennenga, Gerhard Fettweis. 233-241 [doi]
- m-point FFTs and transposingStefan Langemeyer, Peter Pirsch, Holger Blume. 242-248 [doi]
- On-chip network resource management design and validationFrancesco Bruschi, Antonio Miele, Vincenzo Rana. 249-254 [doi]
- Breaking the bandwidth wall in chip multiprocessorsAugusto Vega, Felipe Cabarcas, Alex Ramírez, Mateo Valero. 255-262 [doi]
- Instruction buffer with limited control flow and loop nest supportVladimír Guzma, Teemu Pitkänen, Jarmo Takala. 263-269 [doi]
- Optimizing wait-states in the synthesis of memory references with unpredictable latenciesYosi Ben-Asher, Ron Meldiner, Nadav Rotem. 270-277 [doi]
- A kernel interleaved scheduling method for streaming applications on soft-core vector processorsChengwei Zheng, John McAllister, Yun Wu. 278-285 [doi]
- Multicore Communications API (MCAPI) implementation on an FPGA multiprocessorLauri Matilainen, Erno Salminen, Timo D. Hämäläinen, Marko Hännikäinen. 286-293 [doi]
- MOVE-Pro: A low power and high code density TTA architectureYifan He, Dongrui She, Bart Mesman, Henk Corporaal. 294-301 [doi]
- Special session on "3D chips: Challenges and opportunities"Tong Zhang 0002. 302 [doi]
- Analyzing the performance and energy impact of 3D memory integration on embedded DSPsDaniel W. Chang, Nam Sung Kim, Michael J. Schulte. 303-310 [doi]
- Functional unit sharing between stacked processors in 3D integrated systemsDemid Borodin, Winston Siauw, Sorin Dan Cotofana. 311-317 [doi]
- On-chip dynamic programming networks using 3D-TSV integrationRa'ed Al-Dujaily, Terrence S. T. Mak, Kuan Zhou, Kai-Pui Lam, Yicong Meng, Alexandre Yakovlev, Chi-Sang Poon. 318-325 [doi]
- 3D specific systems design and CADPaul D. Franzon, W. Rhett Davis, Thorlindur Thorolfsson, Samson Melamed. 326-329 [doi]
- Special session on "What's next for ESL"Christian Haubelt. 330 [doi]
- Challenges of multi- and many-core architectures for electronic system-level designKim Grüttner, Philipp A. Hartmann, Philipp Reinkemeier, Frank Oppenheimer, Wolfgang Nebel. 331-338 [doi]
- Integrated model-driven design-space exploration for embedded systemsNikola Trcka, Martijn Hendriks, Twan Basten, Marc Geilen, Lou J. Somers. 339-346 [doi]
- Trends in embedded software synthesisJerónimo Castrillón, Weihua Sheng, Rainer Leupers. 347-354 [doi]
- Software synthesis in the ESL methodology for multicore embedded systemsSoonhoi Ha, Hyunok Oh. 355-362 [doi]
- Special session on "adaptive systems"Gerard J. M. Smit. 363 [doi]
- Admission control and self-configuration in the EPOC frameworkSteffen Stein, Moritz Neukirchner, Rolf Ernst. 364-371 [doi]
- Mapping of modal applications given throughput and latency constraintsStefan J. Geuns, Joost P. H. M. Hausmans, Marco Bekooij. 372-379 [doi]
- Heterogeneous and runtime parameterizable Star-Wheels Network-on-ChipDiana Göhringer, Oliver Oey, Michael Hübner, Jürgen Becker. 380-387 [doi]
- Adaptive resource allocation for streaming applicationsTimon D. ter Braak, Hermen A. Toersche, André B. J. Kokkeler, Gerard J. M. Smit. 388-395 [doi]
- Composable power management with energy and power budgets per applicationAndrew Nelson, Anca Mariana Molnos, Kees Goossens. 396-403 [doi]
- Scenario-aware dataflow: Modeling, analysis and implementation of dynamic applicationsSander Stuijk, Marc Geilen, Bart D. Theelen, Twan Basten. 404-411 [doi]