Integrating a Boolean Satisfiability Checker and BDDs for Combinational Equivalence Checking

Aarti Gupta, Pranav Ashar. Integrating a Boolean Satisfiability Checker and BDDs for Combinational Equivalence Checking. In 11th International Conference on VLSI Design (VLSI Design 1991), 4-7 January 1998, Chennai, India. pages 222-225, IEEE Computer Society, 1998. [doi]

Authors

Aarti Gupta

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Pranav Ashar

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