45nm Bit-Interleaving Differential 10T Low Leakage FinFET Based SRAM with Column-Wise Write Access Control

Vishal Gupta, Saurabh Khandelwal, Jimson Mathew, Marco Ottavi. 45nm Bit-Interleaving Differential 10T Low Leakage FinFET Based SRAM with Column-Wise Write Access Control. In 2018 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2018, Chicago, IL, USA, October 8-10, 2018. pages 1-6, IEEE Computer Society, 2018. [doi]

@inproceedings{GuptaKMO18,
  title = {45nm Bit-Interleaving Differential 10T Low Leakage FinFET Based SRAM with Column-Wise Write Access Control},
  author = {Vishal Gupta and Saurabh Khandelwal and Jimson Mathew and Marco Ottavi},
  year = {2018},
  doi = {10.1109/DFT.2018.8602981},
  url = {https://doi.org/10.1109/DFT.2018.8602981},
  researchr = {https://researchr.org/publication/GuptaKMO18},
  cites = {0},
  citedby = {0},
  pages = {1-6},
  booktitle = {2018 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2018, Chicago, IL, USA, October 8-10, 2018},
  publisher = {IEEE Computer Society},
  isbn = {978-1-5386-8398-9},
}