Design and Evaluation of multipliers for hardware accelerated on-chip EdDSA

Harshita Gupta, Mayank Kabra, Nitin D. Patwari, Prashanth H. C., Madhav Rao. Design and Evaluation of multipliers for hardware accelerated on-chip EdDSA. In 24th International Symposium on Quality Electronic Design, ISQED 2023, San Francisco, CA, USA, April 5-7, 2023. pages 1-9, IEEE, 2023. [doi]

@inproceedings{GuptaKPCR23,
  title = {Design and Evaluation of multipliers for hardware accelerated on-chip EdDSA},
  author = {Harshita Gupta and Mayank Kabra and Nitin D. Patwari and Prashanth H. C. and Madhav Rao},
  year = {2023},
  doi = {10.1109/ISQED57927.2023.10129381},
  url = {https://doi.org/10.1109/ISQED57927.2023.10129381},
  researchr = {https://researchr.org/publication/GuptaKPCR23},
  cites = {0},
  citedby = {0},
  pages = {1-9},
  booktitle = {24th International Symposium on Quality Electronic Design, ISQED 2023, San Francisco, CA, USA, April 5-7, 2023},
  publisher = {IEEE},
  isbn = {979-8-3503-3475-3},
}