A low power decimation filter architecture for high-speed single-bit sigma-delta modulation

Oscar Gustafsson, Henrik Ohlsson. A low power decimation filter architecture for high-speed single-bit sigma-delta modulation. In International Symposium on Circuits and Systems (ISCAS 2005), 23-26 May 2005, Kobe, Japan. pages 1453-1456, IEEE, 2005. [doi]

@inproceedings{GustafssonO05,
  title = {A low power decimation filter architecture for high-speed single-bit sigma-delta modulation},
  author = {Oscar Gustafsson and Henrik Ohlsson},
  year = {2005},
  doi = {10.1109/ISCAS.2005.1464872},
  url = {http://dx.doi.org/10.1109/ISCAS.2005.1464872},
  tags = {architecture},
  researchr = {https://researchr.org/publication/GustafssonO05},
  cites = {0},
  citedby = {0},
  pages = {1453-1456},
  booktitle = {International Symposium on Circuits and Systems (ISCAS 2005), 23-26 May 2005, Kobe, Japan},
  publisher = {IEEE},
}