A low power decimation filter architecture for high-speed single-bit sigma-delta modulation - researchr publication related

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Oscar Gustafsson, Henrik Ohlsson. A low power decimation filter architecture for high-speed single-bit sigma-delta modulation. In International Symposium on Circuits and Systems (ISCAS 2005), 23-26 May 2005, Kobe, Japan. pages 1453-1456, IEEE, 2005. [doi]

The following publications are possibly variants of this publication:

Bit-level optimized FIR filter architectures for high-speed decimation applicationsAnton Blad, Oscar Gustafsson. iscas 2008: 1914-1917 [doi]

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