Architectural and compiler support for energy reduction in the memory hierarchy of high performance microprocessors

Ibrahim N. Hajj, George D. Stamoulis, Nikolaos Bellas, Constantine D. Polychronopoulos. Architectural and compiler support for energy reduction in the memory hierarchy of high performance microprocessors. In Anantha Chandrakasan, Sayfe Kiaei, editors, Proceedings of the 1998 International Symposium on Low Power Electronics and Design, 1998, Monterey, California, USA, August 10-12, 1998. pages 70-75, ACM, 1998. [doi]

Authors

Ibrahim N. Hajj

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George D. Stamoulis

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Nikolaos Bellas

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Constantine D. Polychronopoulos

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