Raju Halder, Parthasarathi Dasgupta, Saptarshi Naskar, Samar Sen-Sarma. An internet-based IP protection scheme for circuit designs using linear feedback shift register (LFSR)-based locking. In Ivan Saraiva Silva, Renato Perez Ribas, Calvin Plett, editors, Proceedings of the 22st Annual Symposium on Integrated Circuits and Systems Design: Chip on the Dunes, SBCCI 2009, Natal, Brazil, August 31 - September 03, 2009. ACM, 2009. [doi]
IP reuse is rapidly proliferating recent automated circuit design. It is facing serious challenges like forgery, theft and misappropriation of intellectual property (IP) of the design. Thus, protection of design IP is a matter of prime concern. In this paper, we propose a novel Internet-based scheme to tackle this problem. Input to the proposed scheme is a graph corresponding to a digital system design. Watermarking of the graph and its encryption are achieved using a new linear feedback shift register(LFSR)-based locking scheme. The proposed scheme makes unauthorized disclosure of valuable design almost infeasible, and can easily detect any alteration of the design file during transmission. It ensures authentication of the original designer as well as non-repudiation between the seller and the buyer. Empirical evidences on several benchmark problem sets are encouraging.