A conditional clocking flip-flop for low power H.264/MPEG-4 audio/visual codec LSI

Mototsugu Hamada, Hiroyuki Hara, Tetsuya Fujita, Chen Kong Teh, Takayoshi Shimazawa, Naoyuki Kawabe, Takeshi Kitahara, Yu Kikuchi, Tsuyoshi Nishikawa, Makoto Takahashi, Yukihito Oowaki. A conditional clocking flip-flop for low power H.264/MPEG-4 audio/visual codec LSI. In Proceedings of the IEEE 2005 Custom Integrated Circuits Conference, CICC 2005, DoubleTree Hotel, San Jose, California, USA, September 18-21, 2005. pages 527-530, IEEE, 2005. [doi]

@inproceedings{HamadaHFTSKKKNT05,
  title = {A conditional clocking flip-flop for low power H.264/MPEG-4 audio/visual codec LSI},
  author = {Mototsugu Hamada and Hiroyuki Hara and Tetsuya Fujita and Chen Kong Teh and Takayoshi Shimazawa and Naoyuki Kawabe and Takeshi Kitahara and Yu Kikuchi and Tsuyoshi Nishikawa and Makoto Takahashi and Yukihito Oowaki},
  year = {2005},
  doi = {10.1109/CICC.2005.1568722},
  url = {http://dx.doi.org/10.1109/CICC.2005.1568722},
  researchr = {https://researchr.org/publication/HamadaHFTSKKKNT05},
  cites = {0},
  citedby = {0},
  pages = {527-530},
  booktitle = {Proceedings of the IEEE 2005 Custom Integrated Circuits Conference, CICC 2005, DoubleTree Hotel, San Jose, California, USA, September 18-21, 2005},
  publisher = {IEEE},
  isbn = {0-7803-9023-7},
}