Bit Cell Optimizations and Circuit Techniques for Nanoscale SRAM Design

Fatih Hamzaoglu, Yih Wang, Pramod Kolar, Liqiong Wei, Yong-Gee Ng, Uddalak Bhattacharya, Kevin Zhang. Bit Cell Optimizations and Circuit Techniques for Nanoscale SRAM Design. IEEE Design & Test of Computers, 28(1):22-31, 2011. [doi]

@article{HamzaogluWKWNBZ11,
  title = {Bit Cell Optimizations and Circuit Techniques for Nanoscale SRAM Design},
  author = {Fatih Hamzaoglu and Yih Wang and Pramod Kolar and Liqiong Wei and Yong-Gee Ng and Uddalak Bhattacharya and Kevin Zhang},
  year = {2011},
  doi = {10.1109/MDT.2011.5},
  url = {http://dx.doi.org/10.1109/MDT.2011.5},
  tags = {optimization, design},
  researchr = {https://researchr.org/publication/HamzaogluWKWNBZ11},
  cites = {0},
  citedby = {0},
  journal = {IEEE Design & Test of Computers},
  volume = {28},
  number = {1},
  pages = {22-31},
}