Improving CMOS open defect coverage using hazard activated tests

Chao Han, Adit D. Singh. Improving CMOS open defect coverage using hazard activated tests. In IEEE 32nd VLSI Test Symposium, VTS 2014, Napa, CA, USA, April 13-17, 2014. pages 1-6, IEEE, 2014. [doi]

Abstract

Abstract is missing.