Simulation and Modeling of Substrate Noise Generation from Synchronous and Asynchronous Digital Logic Circuits

Christopher Hanken, Jim Le, Terri S. Fiez, Kartikeya Mayaram. Simulation and Modeling of Substrate Noise Generation from Synchronous and Asynchronous Digital Logic Circuits. In Proceedings of the IEEE 2007 Custom Integrated Circuits Conference, CICC 2007, DoubleTree Hotel, San Jose, California, USA, September 16-19, 2007. pages 845-848, IEEE, 2007. [doi]

Abstract

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