Implementation of high precision/low latency FP divider using Urdhva-Tiryakbhyam multiplier for SoC applications - researchr publication references

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C. Ravi Shankar Hanuman, J. Kamala, A. R. Aruna. Implementation of high precision/low latency FP divider using Urdhva-Tiryakbhyam multiplier for SoC applications. Design Autom. for Emb. Sys., 24(2):111-125, 2020. [doi]

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