Challenge of MTJ/MOS-hybrid logic-in-memory architecture for nonvolatile VLSI processor - researchr publication

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Takahiro Hanyu. Challenge of MTJ/MOS-hybrid logic-in-memory architecture for nonvolatile VLSI processor. In 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), Beijing, China, May 19-23, 2013. pages 117-120, IEEE, 2013. [doi]

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