Interconnection Allocation Between Functional Units and Registers in High-Level Synthesis

Cong Hao, Jianmo Ni, Nan Wang, Takeshi Yoshimura. Interconnection Allocation Between Functional Units and Registers in High-Level Synthesis. IEEE Trans. VLSI Syst., 25(3):1140-1153, 2017. [doi]

Abstract

Abstract is missing.