Satchidanand G. Haridas, Sotirios G. Ziavras. FPGA implementation of a Cholesky algorithm for a shared-memory multiprocessor architecture. IJPEDS, 19(4):211-226, 2004. [doi]
@article{HaridasZ04,
title = {FPGA implementation of a Cholesky algorithm for a shared-memory multiprocessor architecture},
author = {Satchidanand G. Haridas and Sotirios G. Ziavras},
year = {2004},
doi = {10.1080/10637190412331279957},
url = {http://dx.doi.org/10.1080/10637190412331279957},
tags = {architecture},
researchr = {https://researchr.org/publication/HaridasZ04},
cites = {0},
citedby = {0},
journal = {IJPEDS},
volume = {19},
number = {4},
pages = {211-226},
}