550 Gbps Fully Parallel Fully Unrolled LDPC Decoder in 28 nm CMOS Technology - researchr publication related

researchr

You are not signed in
Sign in
Sign up

A. Hasani, Lukasz Lopacinski, Goran Panic, Eckhard Grass. 550 Gbps Fully Parallel Fully Unrolled LDPC Decoder in 28 nm CMOS Technology. In 2022 Joint European Conference on Networks and Communications & 6G Summit, EuCNC/6G Summit 2022, Grenoble, France, June 7-10, 2022. pages 429-433, IEEE, 2022. [doi]

The following publications are possibly variants of this publication:

Fully Parallel Fully Unrolled BP Decoding of LDPC and Polar CodesAlireza Hasani, Lukasz Lopacinski, Milos Krstic, Eckhard Grass. wcnc 2023: 1-6 [doi]

Data Link Layer Processor for 100 Gbps Terahertz Wireless Communications in 28 nm CMOS TechnologyLukasz Lopacinski, Miroslav Marinkovic, Goran Panic, Mohamed Hussein Eissa, Alireza Hasani, Karthik KrishneGowda, Rolf Kraemer. access, 7:44489-44502, 2019. [doi]

Ultra high speed 802.11n LDPC decoder with seven-stage pipeline in 28 nm CMOSLukasz Lopacinski, A. Hasani, Goran Panic, Nebojsa Maletic, Oliver Schrape, J. Gutiérrez, Milos Krstic, Eckhard Grass, Rolf Kraemer. vtc 2022: 1-5 [doi]

A Hardware Optimized High Throughput LDPC Decoder Supporting 3 Tb/s in 28 nm CMOSLukasz Lopacinski, Alireza Hasani, Goran Panic, Nebojsa Maletic, Jesús Gutiérrez 0004, Milos Krstic, Eckhard Grass, Rolf Kraemer. pimrc 2022: 1326-1331 [doi]

runs on WebDSL