A 55-mW 300MS/s 8-bit CMOS Parallel Pipeline ADC

Manas Kumar Hati, Tarun Kanti Bhattacharyya. A 55-mW 300MS/s 8-bit CMOS Parallel Pipeline ADC. In Vishwani D. Agrawal, Srimat T. Chakradhar, editors, 25th International Conference on VLSI Design, VLSID 2012, Hyderabad, India, January 7-11, 2012. pages 45-50, IEEE, 2012. [doi]

Abstract

Abstract is missing.