A fast and efficient constant loop bandwidth with proposed PFD and pulse swallow divider circuit in ΔΣ fractional-N PLL frequency synthesizer

Manas Kumar Hati, Tarun Kanti Bhattacharyya. A fast and efficient constant loop bandwidth with proposed PFD and pulse swallow divider circuit in ΔΣ fractional-N PLL frequency synthesizer. Microelectronics Journal, 61:21-34, 2017. [doi]

Abstract

Abstract is missing.