Garp: a MIPS processor with a reconfigurable coprocessor

John R. Hauser, John Wawrzynek. Garp: a MIPS processor with a reconfigurable coprocessor. In 5th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 97), 16-18 April 1997, Napa Valley, CA, USA. pages 12-21, IEEE Computer Society, 1997. [doi]

@inproceedings{HauserW97,
  title = {Garp: a MIPS processor with a reconfigurable coprocessor},
  author = {John R. Hauser and John Wawrzynek},
  year = {1997},
  doi = {10.1109/FPGA.1997.624600},
  url = {http://doi.ieeecomputersociety.org/10.1109/FPGA.1997.624600},
  researchr = {https://researchr.org/publication/HauserW97},
  cites = {0},
  citedby = {0},
  pages = {12-21},
  booktitle = {5th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM  97), 16-18 April 1997, Napa Valley, CA, USA},
  publisher = {IEEE Computer Society},
  isbn = {0-8186-8159-4},
}