A 50MHZ-BW continuous-time ΔΣ ADC with dynamic error correction achieving 79.8dB SNDR and 95.2dB SFDR - researchr publication authors

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Tao He 0001, Michael Ashburn, Stacy Ho, Yi Zhang 0023, Gabor C. Temes. A 50MHZ-BW continuous-time ΔΣ ADC with dynamic error correction achieving 79.8dB SNDR and 95.2dB SFDR. In 2018 IEEE International Solid-State Circuits Conference, ISSCC 2018, San Francisco, CA, USA, February 11-15, 2018. pages 230-232, IEEE, 2018. [doi]

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