Kai He, Gert Cauwenberghs. An area-efficient analog VLSI architecture for state-parallel Viterbi decoding. In International Symposium on Circuits and Systems (ISCAS 1999), May 30 - June 2, 1999, Orlando, Florida, USA. pages 432-435, IEEE, 1999. [doi]
@inproceedings{HeC99:0,
title = {An area-efficient analog VLSI architecture for state-parallel Viterbi decoding},
author = {Kai He and Gert Cauwenberghs},
year = {1999},
doi = {10.1109/ISCAS.1999.780756},
url = {http://doi.ieeecomputersociety.org/10.1109/ISCAS.1999.780756},
tags = {architecture},
researchr = {https://researchr.org/publication/HeC99%3A0},
cites = {0},
citedby = {0},
pages = {432-435},
booktitle = {International Symposium on Circuits and Systems (ISCAS 1999), May 30 - June 2, 1999, Orlando, Florida, USA},
publisher = {IEEE},
isbn = {0-7803-5471-0},
}