LOP: a novel SRAM-based architecture for low power and high throughput packet classification

Xin He, Jorgen Peddersen, Sri Parameswaran. LOP: a novel SRAM-based architecture for low power and high throughput packet classification. In Wolfgang Rosenstiel, Kazutoshi Wakabayashi, editors, Proceedings of the 7th International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2009, Grenoble, France, October 11-16, 2009. pages 137-146, ACM, 2009. [doi]

Abstract

Abstract is missing.