A 20 Gb/s Limiting Amplifier in 65nm CMOS technology

Rui He, Jianfei Xu, Na Yan, Min Hao. A 20 Gb/s Limiting Amplifier in 65nm CMOS technology. In IEEE 10th International Conference on ASIC, ASICON 2013, Shenzhen, China, October 28-31, 2013. pages 1-4, IEEE, 2013. [doi]

@inproceedings{HeXYH13,
  title = {A 20 Gb/s Limiting Amplifier in 65nm CMOS technology},
  author = {Rui He and Jianfei Xu and Na Yan and Min Hao},
  year = {2013},
  doi = {10.1109/ASICON.2013.6811865},
  url = {http://dx.doi.org/10.1109/ASICON.2013.6811865},
  researchr = {https://researchr.org/publication/HeXYH13},
  cites = {0},
  citedby = {0},
  pages = {1-4},
  booktitle = {IEEE 10th International Conference on ASIC, ASICON 2013, Shenzhen, China, October 28-31, 2013},
  publisher = {IEEE},
  isbn = {978-1-4673-6415-7},
}